But they aren't high capacity. As far as I've seen, we've been stuck on the same XY size 512 Mb dies for over a decade. Even now, Infineon is claiming they have a series that'll go up to 4 Gb but is still at the standard 2 Gb maximum. NOR hasn't gotten any denser in forever.
What's the use case for a NOR flash that large? Even at 2 Gbit, you're probably better off with something optimized for density like eMMC.
The use is that there's often (in my field) no space for an 11.5x13 eMMC. There are some that are slightly smaller, but as you brought up the wlcsp-8, there's nothing like eMMC/high capacity NAND density scaled down. If I had the bits/mm^2 of even NAND 5 years ago, I'd be a happy camper. But that's life.
There's QSPI NAND parts available; they're just annoying to use.
https://www.digikey.com/en/products/detail/winbond-electroni...
https://www.digikey.com/en/products/detail/alliance-memory-i...
There's also 9x8mm eMMC. The big issue with shrinking it further is that it tends to be a module with a separate controller doing lots of things to make the memory reasonable to use.
Yeah those are what I'm looking at, but even then we've been at 8Gb for years. Manufacturers only want SLC NAND in these for valid reasons and I guess the market isn't pushing for now. The 9x8 is useful but the 3.3v that eMMC wants means I can't power off a single cell li-ion without a boost. It's all a nightmare. Trust me I've looked for solutions, unless you know of any silver bullets that came out recently.
And as you surely know, I usually can't boot from NAND (due to the aforementioned annoyance) so I'd have a boot flash and a storage flash and that's unideal.
I'll note though that the controllers are small. You can RE the die size of a common eMMC<->NAND controller and it's much smaller than 9x8. I won't share which because I honestly don't remember if we got an NDA in place but considering they all stack dies in there anyway, I don't really see that as the size driver.
A lot of MCUs can boot from XIP QSPI/OSPI NAND. quite a feat of compatibility engineering - they made the NAND page size match QSPI transfer sizes commonly used to populate caches, so instead of bit level reads, the flash supports only cacheline level reads, which is usually what you need for XIP anyway.
It's too bad not every embedded device is an MCU :/
Nearly anything that can boot from XIP flash can, plenty of MPUs too, also many Intel chips.
Yeah I'm meaning below MCU boot capability, not above
There’s no money in it. Embedded doesn’t pay compared to phones/tablets. So companies are putting their money into that
I'm fully aware of why there's been no improvement, it just sucks for me.
I left embedded when I realized everything, at least in my neck of the woods, was going to end up being cramming phone parts into things that were not phones. The writing has been on the wall for a while now.
Even now as a consumer I can see the stagnation. It's the same parts year after year. Or you become a phone. You have my sympathy.
Are you saying that partly why every device is a “smart” device? Because it’s cheaper to fit components with connectivity already built in so you might as well use it?
At embedded world 2024 they pushed IoT for other reasons. They wanted us to do it for security and updates. No more telling users to put a bin on a flash drive and plug it into a hidden port under the coffee maker or something idk, just be Internet connected. I wouldn't ever say it's cheaper materialsb (though ESP32s are very cheap) or upfront labor, but I'm sure it's cheaper on the support side for bug fixes and stuff. And then they can sell your data, too. Never forget that
That's what this is looking like tbh. I guess I'm just hoping for a miracle. Maybe chiplets will save us.